Verilog-A behavioral modeling of power converters

The paper presents the implementation of a Verilog-A based, behavioral macro model for a flyback power converter to be used in a Spice based simulator (SpectreS by Cadence©). The paper discusses the effectiveness of this simulation strategy in reducing the complexity of a simulation problem, namely the analysis of a new smart-power integrated circuit (IC). The IC consists in a flyback PFC controller with integrated power switch. The problem of simulating the quite complex control circuitry at the transistor level, in the presence of a power switching converter, for a sufficiently long time to appreciate the line side behavior of the PFC, is efficiently solved by substituting the power converter with an input-output behavioral macro model developed in the Verilog-A language. The paper describes the effectiveness of the Verilog-A language in creating macro-models of power converters generalizing the results obtained for the specific flyback case. The description of the converter’s operation, also considering the discontinuous conduction mode (DCM) of operation is shown to be particularly straightforward. The paper also describes the basic controller structure and presents some results of the extensive simulations performed to check the functionality of its different component units with the power converter’s behavioral model.