This paper investigates the switching ripple compensation in multi-sampling digitally controlled Switched- Mode Power Supplies (SMPS) which is based on repetitive control. In integrated digital controllers for SMPS, the main bandwidth limitations come from A/D conversion time, calculation delays and the sample-and-hold effect for the Digital-Pulse-Width Modulation. When the former two are negligible with respect to the switching period, the overall phase lag is dominated by the DPWM, which can be strongly reduced by the multi-sampling approach, thus breaking the bandwidth limitation of the single-sampling solutions. The additional aliasing effects, which would require a filtering action, are avoided exploiting the periodic nature of the switching ripple under steady-state conditions. Since the proposed compensation does not interact with the main controller, the phase boost of the multi-sampling approach is maintained. Simulation and experimental results on a 1.2V – 10 A, 500 kHz synchronous buck converter, where the digital control has been implemented in a Field Programmable Gate Array (FPGA), confirm the properties of the proposed solution.

Repetitive Ripple Estimation in Multi-sampling Digitally Controlled dc-dc Converters

MATTAVELLI, PAOLO;CORRADINI, LUCA
2006

Abstract

This paper investigates the switching ripple compensation in multi-sampling digitally controlled Switched- Mode Power Supplies (SMPS) which is based on repetitive control. In integrated digital controllers for SMPS, the main bandwidth limitations come from A/D conversion time, calculation delays and the sample-and-hold effect for the Digital-Pulse-Width Modulation. When the former two are negligible with respect to the switching period, the overall phase lag is dominated by the DPWM, which can be strongly reduced by the multi-sampling approach, thus breaking the bandwidth limitation of the single-sampling solutions. The additional aliasing effects, which would require a filtering action, are avoided exploiting the periodic nature of the switching ripple under steady-state conditions. Since the proposed compensation does not interact with the main controller, the phase boost of the multi-sampling approach is maintained. Simulation and experimental results on a 1.2V – 10 A, 500 kHz synchronous buck converter, where the digital control has been implemented in a Field Programmable Gate Array (FPGA), confirm the properties of the proposed solution.
2006
Proc. 32nd Annual Conference of the IEEE Industrial Electronics Society (IECON)
1424403901
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11577/2433709
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