Direct injection locking applied to a ring oscillator results in a divide-by-7 frequency divider circuit with a 22% locking range, from 4.1 to 5.1 GHz. The 38 × 31 μm2 65 nm CMOS prototype draws 430 μA from a 1.2 V supply. The output phase noise tracks the reference's one with the expected 17 dB difference at small offsets, settling to a -133dBc/Hz floor at larger offsets. The integrated rms jitter of 1.9 ps is adequate for the target digital clocking applications.

A 4.1 to 5.1 GHz 430 μA injection-locked frequency divider by 7 in 65 nm CMOS

BEVILACQUA, ANDREA;GEROSA, ANDREA;NEVIANI, ANDREA
2010

Abstract

Direct injection locking applied to a ring oscillator results in a divide-by-7 frequency divider circuit with a 22% locking range, from 4.1 to 5.1 GHz. The 38 × 31 μm2 65 nm CMOS prototype draws 430 μA from a 1.2 V supply. The output phase noise tracks the reference's one with the expected 17 dB difference at small offsets, settling to a -133dBc/Hz floor at larger offsets. The integrated rms jitter of 1.9 ps is adequate for the target digital clocking applications.
2010
Proceedings of the European Solid-State Circuits Conference 2010
9781424466627
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11577/2466900
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