Frequency multiplication by 3/2 is proposed as a means to expand the frequency generation capabilities of a single LC VCO. Fractional frequency multiplication is obtained by cascading a broadband injection locked modulo-two divider and a multiply-by-three circuit based on edge combining. The proposed solution is inductorless, thus very compact. It allows the generation of all frequencies from 2.7 to 6.1GHz with a performance suitable for cellular standards. It shows a noise floor below −150 dBc and a spurious level below −35 dBc. The multiplier by 3/2 consumes 5mA and the VCO draws 10mA from a 1.2V supply. The additional power consumption due to the multiplier trades with the small area penalty and the flexibility of this solution, compared to the use of multiple LC VCOs.

A 2.7–6.1GHz CMOS Local Oscillator Based on Frequency Multiplication by 3/2

BEVILACQUA, ANDREA;
2011

Abstract

Frequency multiplication by 3/2 is proposed as a means to expand the frequency generation capabilities of a single LC VCO. Fractional frequency multiplication is obtained by cascading a broadband injection locked modulo-two divider and a multiply-by-three circuit based on edge combining. The proposed solution is inductorless, thus very compact. It allows the generation of all frequencies from 2.7 to 6.1GHz with a performance suitable for cellular standards. It shows a noise floor below −150 dBc and a spurious level below −35 dBc. The multiplier by 3/2 consumes 5mA and the VCO draws 10mA from a 1.2V supply. The additional power consumption due to the multiplier trades with the small area penalty and the flexibility of this solution, compared to the use of multiple LC VCOs.
2011
Proceedings of IEEE NORCHIP 2011
9781457705144
9781457705151
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11577/2480050
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