Novel PLL scheme for grid connection of three-phase power converters

Basic phase-locked loop (PLL) schemes used for the grid connection of three-phase static converters suffer from line voltage harmonics and unbalance. To overcome this shortcoming, the operation of the basic PLL schemes is improved by supplementing them with blocks that pre or post-processes the line voltages. This paper presents a novel improved PLL scheme that, in spite of its simplicity, offers excellent performance. The scheme is composed by two stages, namely a block, termed as StHFPSC, that rejects the harmonics and the negative-sequence component of the line voltages by processing the voltages in the stationary reference frame, and the basic PLL scheme formulated according to the instantaneous p-q power theory (pPLL). The capability of the StHFPSC block in extracting the fundamental harmonic of the positive-sequence component of the line voltages combined with the capability of the pPLL in synthesizing the grid angle give rise to a PLL scheme, termed as stationary reference frame improved pPLL (StI-pPLL), which joins the merits of the two constituent stages. After reviewing the basic and the main improved PLL schemes, the paper describes the StI-pPLL scheme. Then the scheme is tested by simulation under distorted and unbalanced grid conditions to demonstrate its effectiveness. Comparison of the results to those obtained from the pPLL scheme improved in the traditional way points out the superior performance of the novel scheme