The latch-up phenomenon in CMOS is studied by means of a new analytical technique, based on capacitively coupled voltage contrast and image subtraction
Observation of latch-up phenomena in CMOS IC's by means of Digital Differential Voltage Contrast
ZANONI, ENRICO
1984
Abstract
The latch-up phenomenon in CMOS is studied by means of a new analytical technique, based on capacitively coupled voltage contrast and image subtractionFile in questo prodotto:
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