Analysis of d.c. and a.c. anomalous latch-up effects in commercial CMOS integrated circuits

Anomalous effects in electrical latch-up characteristics have been identified both in the d.c. (hysteresis effects) and a.c. (window effects) characteristics of a large sample of commercial CMOS ICs of different suppliers and technologies. Both d.c. and a.c. effects were always present in all tested devices which showed anomalies. Infra-red microscopy and scanning laser microscopy reveal that both effects are caused by current redistribution between different latch-up paths and are therefore correlated