Fast FPGA-based trigger and data acquisition system for the CERN experiment NA62: Architecture and algorithms

We present the design of a common trigger and DAQ system for the high energy Physics experiment NA62. The first level of trigger runs on-line as usual in such kind of experiments, but here is designed as a segment of the DAQ chain, instead of an additional independent system. FPGAs are used to evaluate fast trigger conditions, entirely on the digitized information from read-out electronics. In this way, the whole digitized information from detector is available for triggering and no separate branchs of read-out electronics are necessary. We shall present the architecture of the system, the involved harware, the fast trigger conditions which we are considering for implementation on FPGAs and our preliminary tests. © 2008 IEEE.