The design of massive MIMO, especially at millimeter waves, requires a trade-off between cost and power consumption, balancing the complexity and the performance in terms of achievable rate. A recent trend in the design is to split the pre-coding at the transmitter and the combining at the receiver into a digital and analog part, with hybrid analog-digital schemes. In this paper the effect of phase noise is considered in the design of different hybrid analog-digital alternatives to implement massive MIMO, in particular at very high frequencies. Its effect depending on the number of RF chains, oscillators, and groups of antennas is analyzed providing some insights for the system design. In order to limit the penalty introduced by the phase noise to values below 6 dB, with a number of antennas around 64, the value of phase noise increment variance should be limited below 0.005. This limit is slightly lower in a simplified architecture with more blocks driven by independent oscillators.

Design of pre-coding and combining in hybrid analog-digital massive MIMO with phase noise

Corvaja, Roberto
;
2017

Abstract

The design of massive MIMO, especially at millimeter waves, requires a trade-off between cost and power consumption, balancing the complexity and the performance in terms of achievable rate. A recent trend in the design is to split the pre-coding at the transmitter and the combining at the receiver into a digital and analog part, with hybrid analog-digital schemes. In this paper the effect of phase noise is considered in the design of different hybrid analog-digital alternatives to implement massive MIMO, in particular at very high frequencies. Its effect depending on the number of RF chains, oscillators, and groups of antennas is analyzed providing some insights for the system design. In order to limit the penalty introduced by the phase noise to values below 6 dB, with a number of antennas around 64, the value of phase noise increment variance should be limited below 0.005. This limit is slightly lower in a simplified architecture with more blocks driven by independent oscillators.
2017
Signal Processing Conference (EUSIPCO), 2017 25th European
978-0-9928626-7-1
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11577/3243369
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