This letter presents a dc-dc converter realized in a 130-nm CMOS technology that features the same conversion gain as a standard boost converter,but it is able to process a dual polarity input with a magnitude down to 60 mV. The circuit prototypes feature a regulated output voltage of 1.2 V,an efficiency up to 88% and a maximum output power of 6 mW,while limiting the number of required off-chip components to two capacitors and one inductor.
A 130-nm CMOS Dual Input-Polarity DC-DC Converter for Low-Power Applications
Gatti A.;Spiazzi G.;Gerosa A.;Neviani A.;Bevilacqua A.
2019
Abstract
This letter presents a dc-dc converter realized in a 130-nm CMOS technology that features the same conversion gain as a standard boost converter,but it is able to process a dual polarity input with a magnitude down to 60 mV. The circuit prototypes feature a regulated output voltage of 1.2 V,an efficiency up to 88% and a maximum output power of 6 mW,while limiting the number of required off-chip components to two capacitors and one inductor.File in questo prodotto:
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