This paper describes experimental methods and results for the evaluation of triple modular redundancy SEU mitigation techniques with the Xilinx Kintex-7 FPGA. Testing was performed both in proton irradiation and fault injection tests.
Experimental methods and results for the evaluation of triple modular redundancy SEU mitigation techniques with the Xilinx Kintex-7 FPGA
Giubilato, P;
2017
Abstract
This paper describes experimental methods and results for the evaluation of triple modular redundancy SEU mitigation techniques with the Xilinx Kintex-7 FPGA. Testing was performed both in proton irradiation and fault injection tests.
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