ABSTRACT A new pixel readout prototype has been developed at CERN for high-energy physics applications. This full mixed mode circuit has been implemented in a commercial 0.5 um CMOS technology. Its radiation tolerance has been enhanced by designing all NMOS transistors in enclosed geometry and introducing guardrings wherever necessary. The technique is explained and its e!ectiveness demonstrated on various irradiation measurements on individual transistors and on the prototype. Circuit performance started to degrade only after a total dose of 600 krad - 1.7 Mrad depending on the type of radiation.

Layout tehcniques to enhance the radiation tolerance of standard CMOS technologies.

SEGATO, GIANFRANCO;SORAMEL, FRANCESCA;
2000

Abstract

ABSTRACT A new pixel readout prototype has been developed at CERN for high-energy physics applications. This full mixed mode circuit has been implemented in a commercial 0.5 um CMOS technology. Its radiation tolerance has been enhanced by designing all NMOS transistors in enclosed geometry and introducing guardrings wherever necessary. The technique is explained and its e!ectiveness demonstrated on various irradiation measurements on individual transistors and on the prototype. Circuit performance started to degrade only after a total dose of 600 krad - 1.7 Mrad depending on the type of radiation.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11577/1482836
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