The paper describes the studies and the tests for the development of the insulation structure of the 1 MV-50 A gas insulated (SF6) line of the ITER NBI in the SinGap configuration characterized by two kinds of spacers: at least a couple of disk-shaped spacers, designed to be gas tight, and a larger number (several tens) of inner conductor post spacers. To this aim a test campaign has been carried out to assess the capability of standard epoxy spacers to withstand a high dc voltage with frequent short circuits, simulating the operational condition for the ITER NBI. Two computational tools, the first for the epoxy spacer shape optimization under electrostatic distribution and the other for the nonlinear time variant evolution of the electric field and surface charge, have been developed specifically for designing epoxy spacer under dc voltage stress. The results on the optimization of the disk spacer and on the electric field-surface charge time evolution of the post spacer are reported and discussed. The effects of the SF6 radiation induced conductivity on the post spacer are also reported.

The Insulation Structure of the 1 MV Transmission Line for the ITER Neutral Beam Injector

GOBBO, RENATO;PESAVENTO, GIANCARLO;BETTINI, PAOLO;
2007

Abstract

The paper describes the studies and the tests for the development of the insulation structure of the 1 MV-50 A gas insulated (SF6) line of the ITER NBI in the SinGap configuration characterized by two kinds of spacers: at least a couple of disk-shaped spacers, designed to be gas tight, and a larger number (several tens) of inner conductor post spacers. To this aim a test campaign has been carried out to assess the capability of standard epoxy spacers to withstand a high dc voltage with frequent short circuits, simulating the operational condition for the ITER NBI. Two computational tools, the first for the epoxy spacer shape optimization under electrostatic distribution and the other for the nonlinear time variant evolution of the electric field and surface charge, have been developed specifically for designing epoxy spacer under dc voltage stress. The results on the optimization of the disk spacer and on the electric field-surface charge time evolution of the post spacer are reported and discussed. The effects of the SF6 radiation induced conductivity on the post spacer are also reported.
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11577/2430216
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