Area-Time Tradeoffs for Universal VLSI Circuits.

An area-universal VLSI circuit can be programmed to emulate every circuit of a given area, but at the cost of lower area-time performance. In particular, if a circuit with area-time bounds (A,T) is emulated by a universal circuit with bounds (A_u,T_u), we say that the universal circuit has blowup A_u/A and slowdown T_u/T. A central question in VLSI theory is to investigate the inherent costs and tradeoffs of universal circuit designs. Prior to this work, universal designs were known for area-A circuits with O(1) blowup and O(\log A) slowdown. Universal designs for the family of area-A circuits containing O(\sqrt{A^{1+epsilon}}log A) vertices, with O(A^epsilon) blowup and O(loglog A) slowdown had also been developed. However, the existence of universal circuits with O(1) slowdown and relatively small blowup was an open question. In this paper, we settle this question by designing an area-universal circuit U_A^epsilon with O(1/epsilon) slowdown and $O(A^epsilon) blowup, for any value of the parameter epsilon, with 4loglogA/log A <= epsilon <= 1. By varying epsilon, we obtain universal circuits which operate at different points in the spectrum of the slowdown-blowup tradeoff. In particular, when epsilon is chosen to be a constant, our universal circuit yields O(1) slowdown.