In wireless broadband communications using code division multiple access (CDMA), interference cancellation (IC) techniques have been proposed to reduce multiuser access interference (MAI); however, their performance is limited by complexity constraints that still favor the use of rake receivers. In this paper, we propose an IC architecture that makes use of a block decision feedback equalizer (DFE) to remove intersymbol interference (ISI) and whose overall complexity is much lower than equivalent (in terms of performance) existing structures. In fact, by making use of a particular block data transmission format, all filters are implemented in the frequency domain (FD), and in particular, the DFE is iteratively designed according to the reliability of the detected data in the previous iteration. Due to the strong interaction of the FD-IC and the block DFE, error propagation in the receiver is reduced by simply interleaving (INT) chips before transmission. Simulations performed for an uplink communication on a wireless multipath channel show that the combination of FD-IC, block DFE, and chip INT provides an efficient solution with good performance for CDMA systems in dispersive channels.

Frequency Domain Interference Cancellation and Nonlinear Equalization for CDMA Systems

TOMASIN, STEFANO;BENVENUTO, NEVIO
2005

Abstract

In wireless broadband communications using code division multiple access (CDMA), interference cancellation (IC) techniques have been proposed to reduce multiuser access interference (MAI); however, their performance is limited by complexity constraints that still favor the use of rake receivers. In this paper, we propose an IC architecture that makes use of a block decision feedback equalizer (DFE) to remove intersymbol interference (ISI) and whose overall complexity is much lower than equivalent (in terms of performance) existing structures. In fact, by making use of a particular block data transmission format, all filters are implemented in the frequency domain (FD), and in particular, the DFE is iteratively designed according to the reliability of the detected data in the previous iteration. Due to the strong interaction of the FD-IC and the block DFE, error propagation in the receiver is reduced by simply interleaving (INT) chips before transmission. Simulations performed for an uplink communication on a wireless multipath channel show that the combination of FD-IC, block DFE, and chip INT provides an efficient solution with good performance for CDMA systems in dispersive channels.
File in questo prodotto:
Non ci sono file associati a questo prodotto.
Pubblicazioni consigliate

I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.

Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11577/2462109
Citazioni
  • ???jsp.display-item.citation.pmc??? ND
  • Scopus 21
  • ???jsp.display-item.citation.isi??? 19
social impact