This work presents a low power fully-integrated galvanic isolator for gate drivers featuring asynchronous full-duplex communication. The proposed design uses ASK and LSK modulation schemes to achieve symmetric 66.7 / 66.7 Mb / s throughput, using a compact 2.2 mm2 chip area. Full-duplex communication is ensured in a completely asynchronous scenario, enabling event-driven bidirectional data transfer through gate drivers. The prototype fabricated in a 0.13 μ m HV CMOS technology consumes 5.75 mW from the 1.5 V supply. The propagation delay at the maximum data rate is below 20 ns.

A 5.75mW Fully-Integrated Galvanic Isolator for Gate Drivers with Asynchronous 66.7/66.7 Mb/s Full-Duplex Communication

Navarin, Lucrezia
;
Neviani, Andrea;Bevilacqua, Andrea
2025

Abstract

This work presents a low power fully-integrated galvanic isolator for gate drivers featuring asynchronous full-duplex communication. The proposed design uses ASK and LSK modulation schemes to achieve symmetric 66.7 / 66.7 Mb / s throughput, using a compact 2.2 mm2 chip area. Full-duplex communication is ensured in a completely asynchronous scenario, enabling event-driven bidirectional data transfer through gate drivers. The prototype fabricated in a 0.13 μ m HV CMOS technology consumes 5.75 mW from the 1.5 V supply. The propagation delay at the maximum data rate is below 20 ns.
2025
Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
2025 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2025
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11577/3559826
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