Tensor networks (TNs) are a computational paradigm used for representing quantum many-body systems. Recent works have shown how TNs can also be applied to perform machine learning (ML) tasks, yielding comparable results to standard supervised learning techniques. In this work, we study the use of Tree TNs (TTNs) in high-frequency real-time applications by exploiting the low-latency hardware of the field-programmable gate array (FPGA) technology. We present different implementations of TTN classifiers, capable of performing inference on classical ML datasets as well as on complex physics data. A preparatory analysis of bond dimensions and weight quantization is realized in the training phase, together with entanglement entropy and correlation measurements, that help setting the choice of the TTN architecture. The generated TTNs are then deployed on a hardware accelerator; using an FPGA integrated into a server, the inference of the TTN is completely offloaded. Eventually, a classifier for high energy physics applications is implemented and executed fully pipelined with sub-microsecond latency.

Ultra-low latency quantum-inspired machine learning predictors implemented on FPGA

Borella, Lorenzo
;
Coppi, Alberto;Triossi, Andrea;Pazzini, Jacopo;Zanetti, Marco;Stanco, Andrea;
2025

Abstract

Tensor networks (TNs) are a computational paradigm used for representing quantum many-body systems. Recent works have shown how TNs can also be applied to perform machine learning (ML) tasks, yielding comparable results to standard supervised learning techniques. In this work, we study the use of Tree TNs (TTNs) in high-frequency real-time applications by exploiting the low-latency hardware of the field-programmable gate array (FPGA) technology. We present different implementations of TTN classifiers, capable of performing inference on classical ML datasets as well as on complex physics data. A preparatory analysis of bond dimensions and weight quantization is realized in the training phase, together with entanglement entropy and correlation measurements, that help setting the choice of the TTN architecture. The generated TTNs are then deployed on a hardware accelerator; using an FPGA integrated into a server, the inference of the TTN is completely offloaded. Eventually, a classifier for high energy physics applications is implemented and executed fully pipelined with sub-microsecond latency.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11577/3573424
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