The degradation of NMOS and PMOS transistors within CMOS inverters has been analyzed. Channel-hot-carrier (CHC) degradation and/or bias temperature instabilities (BTIs) are identified as aging mechanisms, and their implications at the device and circuit levels are discussed. Device- and circuit-level results have been linked using the BSIM4 SPICE model.

Channel-Hot-Carrier Degradation and Bias Temperature Instabilities in CMOS Inverters

GERARDIN, SIMONE;PACCAGNELLA, ALESSANDRO;
2009

Abstract

The degradation of NMOS and PMOS transistors within CMOS inverters has been analyzed. Channel-hot-carrier (CHC) degradation and/or bias temperature instabilities (BTIs) are identified as aging mechanisms, and their implications at the device and circuit levels are discussed. Device- and circuit-level results have been linked using the BSIM4 SPICE model.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11577/2447188
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