This work presents an input stage for a cardiac pacemaker fully integrated in a 0.35μm CMOS technology. The system can acquire and digitize to 8 bits both atrial and ventricular electrical activity. Log-domain circuits are exploited to amplify and filter the input signal, while ΣΔ modulation is exploited to convert it. The design is power optimized, indeed the power consumption is limited to 4.8μW with a power supply down to 1.8V. The total area is 2.2mm2 and experimental data prove correct filtering and a total DR of at least 47dB. © 2003 IEEE.

A Fully-Integrated Two-Channel A/D Interface for the Acquisition of Cardiac Signals in Implantable Pacemakers

GEROSA, ANDREA;MANIERO, ANDREA;NEVIANI, ANDREA
2003

Abstract

This work presents an input stage for a cardiac pacemaker fully integrated in a 0.35μm CMOS technology. The system can acquire and digitize to 8 bits both atrial and ventricular electrical activity. Log-domain circuits are exploited to amplify and filter the input signal, while ΣΔ modulation is exploited to convert it. The design is power optimized, indeed the power consumption is limited to 4.8μW with a power supply down to 1.8V. The total area is 2.2mm2 and experimental data prove correct filtering and a total DR of at least 47dB. © 2003 IEEE.
2003
29th European Solid-State Circuits Conference
29th European Solid-State Circuits Conference, ESSCIRC 2003
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11577/2456876
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