Study on the Origin of Dc-to-RF Dispersion Effects in GaAs- and GaN-Based Heterostructure FETs

Deep-level-induced dc-to-RF dispersion effects, such as gate lag, transconductance (gm) frequency dispersion, and drain-current (ID) collapse, continue to represent a serious limitation for many power microwave FETs based on compound semiconductors, principally because of the associated degradation of output-power density at operating frequencies. In devices with optimized vertical structure growth, dispersion effects, if present, are induced by deep-level traps at the ungated device surface. The influence of surface traps can actually be minimized by reducing gate-recess extension and/or inter-electrode spacings, but, in doing so, a penalty must be accepted in terms of gate-drain breakdown voltage reduction, the inherent trade-off between dc-to-RF dispersion immunity and high-voltage capability making the physical comprehension of dispersion effects crucial for proper process/device optimization. Unfortunately, in spite of extensive research efforts, the physics underlying surface-trap action has not been completely clarified yet. The explanation which is more conventionally accepted is that electrons leaking from the gate metal are trapped/detrapped by surface deep levels. Initially proposed for GaAs MESFETs [1], this explanation has been extended to other III-V FETs [2,3] and, more recently, adopted for GaN-based devices [4]. In the present work a consistent set of experimental and numerical results are presented, addressing dc-to-RF dispersion effects in FETs of two different technologies, namely AlGaAs/GaAs heterostructure FETs (HFETs) and AlGaN/GaN HEMTs. Numerical device simulations suggest that, differently from what commonly assumed, surface traps can behave, during the switching transients of both device types, as hole traps interacting with holes attracted at the ungated surface by surface band bending.