The hysteresis cycle in the latch-up I/V characteristics of CMOS structures has been electrically observed and investigated by means of infra-red microscopy. This technique enables hysteresis effects to be correlated with current density distribution along different parasitic SCRs in a shunt connection. This correlation is confirmed by numerical simulation using SPICE.
Infrared Microscopy Direct Observation of Current Redistribution and Spice Simulation of Latch-up I/v Hysteresis Effects
ZANONI, ENRICO
1989
Abstract
The hysteresis cycle in the latch-up I/V characteristics of CMOS structures has been electrically observed and investigated by means of infra-red microscopy. This technique enables hysteresis effects to be correlated with current density distribution along different parasitic SCRs in a shunt connection. This correlation is confirmed by numerical simulation using SPICE.
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