Anomalous effects have been evidentiated during pulsed I/O overvoltage tests, such as "window effects", i.e. disappearing of the latch-up condition for high I/O injected current. Infrared microscopy observation reveals that anomalous effects are due to the dynamic redistribution of supply current between different latch-up paths. This analysis is confirmed by the SPICE simulation of the lumped equivalent circuit of a CMOS output comprising two coupled pnpn parasitic structures.
Characterization of Anomalous Latch-up Effects By Means of Infrared Microscopy and Spice Simulation
ZANONI, ENRICO
1988
Abstract
Anomalous effects have been evidentiated during pulsed I/O overvoltage tests, such as "window effects", i.e. disappearing of the latch-up condition for high I/O injected current. Infrared microscopy observation reveals that anomalous effects are due to the dynamic redistribution of supply current between different latch-up paths. This analysis is confirmed by the SPICE simulation of the lumped equivalent circuit of a CMOS output comprising two coupled pnpn parasitic structures.File in questo prodotto:
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