Electrical overstress or electromagnetic interference may induce negative voltages at the input of bipolar Transistor Transistor Logic (TTL) integrated circuits, triggering parasitic elements and leading to circuit malfunction. The paper identifies some of the parasitic circuits responsible for this failure.
Failure modes induced in TTL-LS bipolar logics by negative inputs
ZANONI, ENRICO
1982
Abstract
Electrical overstress or electromagnetic interference may induce negative voltages at the input of bipolar Transistor Transistor Logic (TTL) integrated circuits, triggering parasitic elements and leading to circuit malfunction. The paper identifies some of the parasitic circuits responsible for this failure.
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