CMOS scaling has a beneficial impact on the radiation hardness of the technologies and often only requires a further optimization of either the Shallow Trench Isolation (STI) or the Buried Oxide (BOX) in case of a SOI technology. From a reliability viewpoint, heavy-ion induced ionization damage in the gate dielectric may lead to Radiation-Induced Leakage Current (RILC), Radiationinduced Soft Breakdown (RSB), Single Event Gate Rupture (SEGR) or the creation of latent damage. This paper discusses the present knowledge of the radiation impact on the operation and the reliability of deep submicron CMOS technologies.

Impact of radiation on the operation and reliability of deep submicron CMOS

GRIFFONI, ALESSIO;CESTER, ANDREA;MENEGHESSO, GAUDENZIO;PACCAGNELLA, ALESSANDRO;
2010

Abstract

CMOS scaling has a beneficial impact on the radiation hardness of the technologies and often only requires a further optimization of either the Shallow Trench Isolation (STI) or the Buried Oxide (BOX) in case of a SOI technology. From a reliability viewpoint, heavy-ion induced ionization damage in the gate dielectric may lead to Radiation-Induced Leakage Current (RILC), Radiationinduced Soft Breakdown (RSB), Single Event Gate Rupture (SEGR) or the creation of latent damage. This paper discusses the present knowledge of the radiation impact on the operation and the reliability of deep submicron CMOS technologies.
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11577/2523216
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