DfT Reuse for Low-Cost Radiation Testing of SoCs: A Case Study

This paper proposes an efficient low-cost strategy for collecting data during radiation experiments on Systems-on-Chips (SoCs), exploiting the available on-chip Design for Testability (DfT) structures devised for manufacturing test. The approach combines hardware test and diagnostic features with suitable software tools, which enable accurate measurements and quick transient effects data collection. Specific flows for radiation testing of different kinds of embedded cores are described. Results are shown for a radiation experiment conducted on an embedded SRAM core included in a 90nm test-vehicle.