Logic gate for integrated circuits (ICs), has first pair of switches activated alternately and connected to first node and output node by respective terminal, and second pair of switches to bring output node to potential of second node

NOVELTY - The logic gate (100) has a Boolean network (105) having input node (106), output node (107), and terminal (108). The output node is connected to a first pair of switches (101,102) which are activated alternately, and which are respectively connected to the first node (109) and output node by a respective terminal. A second pair of switches (103,104) are provided between the first pair of switches, and connected to a second node (110). The second pair of switches are connected together to turn ON and OFF to bring the output node to the potential of the second node at fixed potential. USE - Logic gate for ICs. Can be used in complementary metal oxide semiconductor (CMOS) ICs and digital circuits. ADVANTAGE - Provides a logic gate with reduced number of switches, especially for applications in ICs. Allows to have a static power dissipation essentially zero and output logical levels equal to the low and high values of the supply voltages of the gate by requiring a reduced number of components. Provides a logic gate structure which have low parasitic capacitances, both incoming and outgoing. Ensures low delay propagation times of the logic gate structure which is independent from the Boolean function implemented by the gate in which the logic is applied. Ensures that the logic gate is highly reliable, is easy to provide, and has competitive costs. Ensures that the parasitic capacitances and propagation times are dramatically reduced. DETAILED DESCRIPTION - The terminal is connected to the first node at a fixed potential corresponding to a first logical level of the logic gate. The second pair of switches is connected to the second node at a fixed potential corresponding to a second logical level of the logic gate. The switches of the second pair of switches are connected together, such that when one switch is turned ON, the other one is turned OFF, and when one of the switches in the second pair is turned on, the output node is brought to the potential of the second node at fixed potential.