Off-state and on-state drain and gate current degradation of AlGaN/GaN High Electron Mobility Transistors on SiC substrate

Some AlGaN/GaN HEMT technologies are prone to a degradation mechanism consisting in the increase of gate current consequent to off-state or reverse gate voltage tests [1]. Gate current degradation is accompanied by the generation of deep levels having an activation energy around 0.5 eV [2]. The kinetics of defect generation at the edges of the gate Schottky contact can be followed by means of electroluminescence (EL) microscopy [3]. Recently, it has been shown that this failure mechanism has close similarities with the time-dependent dielectric breakdown mechanism of MOS transistors [4]. This time dependence has important consequences for rf device testing [5]. We studied the kinetics of gate current increase in a wide set of devices having identical layout but different technologies (e.g. AlGaN thickness and composition) and confirmed the time-dependent mechanism. In all tested devices, at a certain reverse voltage value, failure does not take place suddenly, but requires a certain time to occur. Charge trapping, both under the gate and in the access regions [6] may increase the critical voltage and interfere with degradation kinetics. Generation of traps takes place during the stress ; the catastrophic increase of gate current is announced by an increase in gate current fluctuations or noise (Fig. 1), which become very pronounced after the current path has been created (after 320 s in Fig. 1) and can be detected as a hot spot in the EL image (Fig. 2). These current paths can be turned on and off, giving raise to IG fluctuations.