Drain Current Collapse in 65 nm pMOS Transistors After Exposure to Grad Dose

Total ionizing dose (TID) response of pMOS transistors featuring a commercial 65 nm CMOS technology was studied by X-ray irradiation up to 1 Grad(SiO2), which emulated total dose target in the LHC upgrade. After irradiation, dramatic reduction of drain current was observed, the degradation level showed a strong dependency on gate width. At total doses higher than 208hbox{Mrad}(SiO2), the off-state leakage was heightened by more than one order of magnitude, which was attributed to the gate-induced drain leakage (GIDL) due to the positive charge trapping in STI and/or gate oxide. The subthreshold swing (SS) and the threshold voltage remained practical constant even at 1 Grad(SiO2) total dose. The degradation in the drain current can be partially explained by the radiation induced narrow channel effect due to the positive charge trapping in STI. However, from the comparison results under two bias conditions during irradiation, there must be other mechanisms contributing together. Damage of the gate oxide could be another mechanism contributing to the dramatic drain current reduction.