MAGNONE, PAOLO
MAGNONE, PAOLO
Dipartimento di Tecnica e Gestione dei Sistemi Industriali - DTG
Impact of the interfacial layer on the low-frequency noise (1/f) behavior of MOSFETs with advanced gate stacks
2006 Crupi, F; Srinivasan, P; Magnone, P; Simoen, E; Pace, C; Misra, D; Claeys, C
Impact of the interfacial layer on the low-frequency noise (1/f) behavior of MOSFETs with advanced gate stacks
2006 Crupi, F; Srinivasan, P; Magnone, P; Simoen, E; Pace, C; Misra, D; Claeys, C
Fermi-level pinning at polycrystalline silicon-HfO2 interface as a source of drain and gate current 1/f noise
2007 Magnone, P; Crupi, F; Pantisano, L; Pace, C
Interfacial layer quality effects on low-frequency noise (1/f) in p-MOSFETs with advanced gate stacks
2007 Srinivasan, P; Crupi, F; Simoen, E; Magnone, P; Pace, C; Misra, D; Claeys, C
Low frequency noise in nMOSFETs with subnanometer EOT hafnium-based gate dielectrics
2007 Magnone, P; Pace, C; Crupi, F; Giusi, G
On the impact of defects close to the gate electrode on the low-frequency 1/f noise
2008 Magnone, P; Pantisano, L; Crupi, F; Trojman, L; Pace, C; Giusi, G
A model for MOS gate stack quality evaluation based on the gate current 1/f noise
2008 Magnone, P; Crupi, C; Iannaccone, G; Giusi, G; Pace, C; Simoen, E; Claeys, C
Gate voltage and geometry dependence of the series resistance and of the carrier mobility in FinFET devices
2008 Magnone, P; Subramanian, V; Parvais, B; Mercha, A; Pace, C; Dehan, M; Decoutere, S; Groeseneken, G; Crupi, F; Pierro, S
Modeling the gate current 1/f noise and its application to advanced CMOS devices
2008 Crupi, F; Magnone, P; Iannaccone, G; Giusi, G; Pace, C; Simoen, E; Claeys, C
Performance of current mirror with high-k gate dielectrics
2008 Crupi, F; Magnone, P; Pugliese, A; Cappuccino, G
Full Model and Characterization of Noise in Operational Amplifier
2009 Giusi, G; Crupi, F; Pace, C; Magnone, P
The role of the interfaces in the 1/f noise of MOSFETs with high-k gate stacks
2009 Crupi, F; Magnone, P; Simoen, E; Mercha, A; Pantisano, L; Giusi, G; Pace, C; Claeys, C
1/f Noise in Drain and Gate Current of MOSFETs With High-k Gate Stacks
2009 Magnone, P; Crupi, F; Giusi, G; Pace, C; Simoen, E; Claeys, C; Pantisano, L; Maji, D; Rao, V R; Srinivasan, P
Characterization of interface and oxide traps in Ge pMOSFETs based on DCIV technique
2009 Maji, D; Crupi, F; Magnone, P; Giusi, G; Pace, C; Simoen, E; Rao, V R
Understanding and Optimization of Hot-Carrier Reliability in Germanium-on-Silicon pMOSFETs
2009 Maji, D; Crupi, F; Amat, E; Simoen, E; De Jaeger, B; Brunco, D P; Manoj, C R; Rao, V R; Magnone, P; Giusi, G; Pace, C; Pantisano, L; Mitard, J; Rodriguez, R; Nafria, M
Matching Performance of FinFET Devices With Fin Widths Down to 10 nm
2009 Magnone, P; Mercha, A; Subramanian, V; Parvais, P; Collaert, N; Dehan, M; Decoutere, S; Groeseneken, G; Benson, J; Merelle, T; Lander, R J P; Crupi, F; Pace, C
Analytical model for the 1/f noise in the tunneling current through metal-oxide-semiconductor structures
2009 Crupi, F; Giusi, G; Iannaccone, G; Magnone, P; Pace, C; Simoen, E; Claeys, C
High-mobility 0.85nm-EOT Si0.45Ge0.55-pFETs: Delivering high performance at scaled VDD
2010 Mitard, J; Witters, L; Bardon, M G; Christie, P; Franco, J; Mercha, A; Magnone, P; Alioto, M; Crupi, F; Ragnarsson, L-A; Hikavyy, A; Vincent, B; Chiarella, T; Loo, R; Tseng, J; Yamaguchi, S; Takeoka, S; Wang, W-E; Absil, P; Hoffmann, T
FinFET Mismatch in Subthreshold Region: Theory and Experiments
2010 Magnone, Paolo; Crupi, F.; Mercha, A.; Andricciola, P.; Tuinhout, H.; Lander, R. J. P.
Implications of fin width scaling on variability and reliability of high-k metal gate FinFETs
2010 Chabukswar, S; Maji, D; Manoj, C R; Anil, K G; Rao, V R; Crupi, F; Magnone, P; Giusi, G; Pace, C; Collaert, N