We performed gate ramp voltage stress on III-V InGaAs based MOSFETs. Stress induces trapped charge and it also leads to interface trap generation, which has detrimental effects on the subthreshold slope and on the transconductance. At high electric fields, before the hard breakdown, a very low-frequency high-current random telegraph noise appears at the gate, which seems to be not correlated with the soft breakdowns commonly observed in other devices.
Degradation of III-V inversion-type enhancement-mode MOSFETs
WRACHIEN, NICOLA;CESTER, ANDREA;ZANONI, ENRICO;MENEGHESSO, GAUDENZIO;
2010
Abstract
We performed gate ramp voltage stress on III-V InGaAs based MOSFETs. Stress induces trapped charge and it also leads to interface trap generation, which has detrimental effects on the subthreshold slope and on the transconductance. At high electric fields, before the hard breakdown, a very low-frequency high-current random telegraph noise appears at the gate, which seems to be not correlated with the soft breakdowns commonly observed in other devices.
File in questo prodotto:
Non ci sono file associati a questo prodotto.
Pubblicazioni consigliate
I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
