We performed gate ramp voltage stress on III-V InGaAs based MOSFETs. Stress induces trapped charge and it also leads to interface trap generation, which has detrimental effects on the subthreshold slope and on the transconductance. At high electric fields, before the hard breakdown, a very low-frequency high-current random telegraph noise appears at the gate, which seems to be not correlated with the soft breakdowns commonly observed in other devices.

Degradation of III-V inversion-type enhancement-mode MOSFETs

WRACHIEN, NICOLA;CESTER, ANDREA;ZANONI, ENRICO;MENEGHESSO, GAUDENZIO;
2010

Abstract

We performed gate ramp voltage stress on III-V InGaAs based MOSFETs. Stress induces trapped charge and it also leads to interface trap generation, which has detrimental effects on the subthreshold slope and on the transconductance. At high electric fields, before the hard breakdown, a very low-frequency high-current random telegraph noise appears at the gate, which seems to be not correlated with the soft breakdowns commonly observed in other devices.
2010
IRPS2010, International Reliability Physics Symposium.
9781424454310
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11577/2446253
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