Degradation and reliability of GaN-based lateral and vertical transistors

Over the last decade, gallium nitride has been extensively investigated as a semiconductor for application in power electronics. The wide energy gap enables high temperature operation, while the high breakdown field gives relevant advantages for the fabrication of high voltage (600-900 V) devices, which are relevant for industrial and consumer applications. The efficiency of GaN-based power converters can be higher than 99 %, and this is motivating several industrial players that are investing actively in this field. Two different kinds of GaN power devices are being currently investigated: a) GaN lateral transistors, that exploit the high mobility of the 2DEG formed at the AlGaN/GaN interface to minimize on-resistance; these devices can be effectively grown on 200 mm silicon substrates, with a silicon compatible process. b) GaN vertical devices, either grown on free standing GaN or on a foreign (Si) substrate. GaN devices can be operated at temperatures and fields much higher than silicon components, and for this reason the potential reliability issues must be studied in detail. The aim of this presentation is to give an overview of our most recent results on the degradation and reliability of GaN-based power components. We will consider both lateral and vertical devices, by presenting recent case studies on the topic. First, we will discuss the degradation of GaN-based lateral HEMTs, by focusing on the following aspects: a) the degradation of GaN-based lateral transistors submitted to off-state stress. We will focus on the time-dependent lateral breakdown, and on the failure limits of the vertical (GaN-on-Si) epitaxy. Also, we will discuss about the breakdown robustness of the AlN nucleation layer that is usually employed as a start material for the growth of the epitaxial stack. b) the behavior of GaN-based gate-injection transistors (GITs) submitted to semi-on stress experiments. Specifically, we will discuss the role of hot-electrons in device degradation, and will describe the differences between GITs and HD-GITs in terms of semi-on state trapping; c) the stability of the gate stack of e-mode HEMTs, and the related threshold voltage variations. In the second part of the presentation we will focus on the degradation processes of GaN vertical devices; specifically, we will discuss: a) the degradation of pn diodes submitted to stress at high current densities, and the possible role of hydrogen diffusion in the degradation process; b) the behavior of GaN-on-GaN vertical devices near the avalanche regime, and the role of defects in modifying the avalanche voltage; c) the stability and reliability of GaN-on-GaN vertical FETs, by presenting a detailed analysis of the threshold voltage transients during stress at positive gate voltage. The results presented within this paper will give an up-to-date overview of the most relevant results on GaN stability and reliability.